标签：column chip Memory rank memory DRAM bank row

【百度百科】中国港台地区把内存芯片叫做“内存颗粒”，其它芯片叫做“晶片”。搜memory particle结果很少：

https://golerugged.com/article/284.html
The full name is Quad-Level Cell, a four-layer storage unit, that is, 4bits/cell. QLC flash memory particles have higher storage density than TLC, and at the same time, the cost is lower than TLC. The advantage is that the capacity can be made larger and the cost is lower. 【深圳一家公司的网页】

SODIMM = Small Outline Dual In-line Memory Module

Main Memory (Part I) - Prof. Onur Mutlu, Carnegie Mellon University

Main Memory,- BRUCE R. CHILDERS, University of Pittsburgh

• A DRAM bank is a 2D array of cells: rows x columns
• Banks receive commands and operate independently
• A "DRAM row" is also called a "DRAM page"
• A "sense amplifier" is also called a "row buffer"

In an SDRAM how do address rows/columns and rank width and bank width relate to the total memory size? - Electrical Engineering Stack Exchange

DRAM channel＞DIMM＞rank＞chip＞bank＞row/column - 这么神奇 - 博客园

距登顶仅一步之遥，国产内存条再创性价比新高

标签：column,chip,Memory,rank,memory,DRAM,bank,row
来源： https://www.cnblogs.com/funwithwords/p/16608446.html

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